Microchip Technology Freshers Recruitment 2022 – Job Openings For Design Engineer – Masters Degree Date Posted 15th March 2022

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Job Category: IT/Software

Role: Design Engineer

Company Name: Microchip Technology

Job Position: Design Engineer

Experience: Freshers/Experience(0-2 Years)

Job Location: Bangalore

Qualification: Masters Degree

Date of Joining: Immediate Joiners

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Job Description:

  • The Wireless Solutions Group is looking for a highly motivated, problem solving new college graduate to work in the SoC team as Digital Design Engineer.
  • The primary responsibility is to support product development for our next generation wireless products.
  • The role involves “hands-on” logic design work using System Verilog & working with design verification, implementation teams using an industry leading ASIC design flow to realize the designs.

Key Responsibilities:

  • Work with the design team in overcoming HDL design challenges, achieving verification goals, and assisting with critical debug activities at both the unit and full-chip level
  • Candidate will perform the integration of subsystems into a MIPS/ARM processor based SOCs
  • Perform spec reviews, code reviews, coverage analysis, etc. in support of corporate ISO Quality Systems

Eligibility Criteria:

Required Education:

  • Master’s Degree in Electrical/Electronic Engineering with 0-2 years experience
Skills Required:

Job Requirements:

Required Skills:

  • Knowledge of System Verilog and/or VHDL, and experience with simulators and waveform debugging tools
  • Digital system-level design and knowledge, including use of standard bus protocols, bus architecture design and chip-level clock and reset architecture
  • Knowledge of ASIC Design with keen understanding on Performance/Area/Power trade-offs
  • Knowledge of common UNIX scripting languages (Perl, Python, csh, etc.) & C Programming Language
  • Superior Written and Verbal Communication skills

Desired Skills:

  • Familiarity in multi-voltage domain flows using UPF/CPF (IEEE-1801) for power intent definition
  • Familiarity in ASIC implementation methodology steps like lint, CDC, Synthesis, formal verification, and STA
  • Familiarity in MIPS/ARM processor based subsystem
Salary:
  • Not Mentioned

Last Date To Apply: Apply As Soon As Possible

Apply Here: Click Here

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